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Central Processing Unit Microchip 1891ВМ01A8, 1891ВМ01B8, 1891ВМ01CЯ Model MCST R2000

Central Processing Unit Microchip 1891ВМ01A8, 1891ВМ01B8, 1891ВМ01CЯ Model MCST R2000 — MCST OJSC

Brend: Elbrus
so'm 11,340,000 - so'm 45,360,000 UZS
MOQ: 2 pieces

Asosiy xususiyatlar

Clock frequency: 2000
Number of cores: 8 pcs
Power consumption: NZ-150-14,5 W
Operating temperature range of the medium: ?60…+90 °C

Yana shu brenddan Elbrus

4E16-2U Server for Corporate and Cloud Data Centers

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High-Performance Server Platform 4E8-2U TVGI.469549.009

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Elbrus 101-RC Computing Complex for Automated Workplaces

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Elbrus-1C+ Integrated Circuits 1891VM11A, 1891VM11B, 1891VM11V

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Computing Platform for Corporate and Cloud Data Centers 4E16-2U TVGI.469549.016

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Peripheral Interface Controller KPI-2

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Automated Workstation for Information Processing - TVGI.466256.021 1E8SV-6M

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so'm 3,780,000-so'm 22,680,000

Tavsif

CPU chip 1891VM018 is a server-class computer. It contains 8 cores of "SPARC" architecture 9-th version with clock frequency up to 2000 MHz.

It allows to build multiprocessor servers and workstations, as well as on-board computers demanding the speed of information processing and transmission.

Availability of 3 channels of interprocessor exchange allows to build scalable computing complexes providing high speed of processing and information transfer..

Xususiyatlar

Clock frequency
2000
Number of cores
8 pcs
Power consumption
NZ-150-14,5 W
Operating temperature range of the medium
?60…+90 °C
Power supply voltage
1.8 V
Number of transistors
0.5
Technological process
28 nm
Compatible South Bridge VLSIs
kpi-2
I/O/RemoteDMA channel bandwidth
10
I/O/RemoteDMA channels
1 pcs
Throughput of each interprocessor communication channel
5
Possibility to combine into a multiprocessor system with coherent shared memory
up to 4 processors
RAM channel bandwidth
38.4
RAM organization
2 channels DDR4-2400 registered ECC
Level 2 cache memory (universal)
4
Level 1 instruction cache, per core
16
Level 1 data cache, per core
32
Operations per clock (per core)
2 pcs
architecture
SPARC, version 9

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